Programmable Signatures

Internet Worm and Virus Protection in Dynamically Reconfigurable Hardware

The security of the Internet can be improved using Programmable Logic Devices (PLDs). A platform has been implemented that actively scans and filters Internet traffic for Internet worms and viruses at multi-Gigabit/second rates using the Field-programmable Port Extender (FPX). Modular components implemented with Field Programmable Gate Array (FPGA) logic on the FPX process packet headers and sc...

FPGA Implementation of a Re ently Published SignatureS heme ?

Design and Implementation of Field Programmable Gate Array Based Baseband Processor for Passive Radio Frequency Identification Tag (TECHNICAL NOTE)

In this paper, an Ultra High Frequency (UHF) base band processor for a passive tag is presented. It proposes a Radio Frequency Identification (RFID) tag digital base band architecture which is compatible with the EPC C C2/ISO18000-6B protocol. Several design approaches such as clock gating technique, clock strobe design and clock management are used. In order to reduce the area Decimal Matrix C...

Investigation of Electromagnetic Signatures of a Fpga Using an Aprel Em-isight System Thesis

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Stain-free histopathology by programmable supercontinuum pulses

The preparation, staining, visualization, and interpretation of histological images of tissue is well-accepted as the gold standard process for the diagnosis of disease. These methods were developed historically, and are used ubiquitously in pathology, despite being highly time and labor intensive. Here we introduce a unique optical imaging platform and methodology for label-free multimodal mul...

An Efficient Algorithm for Output Coding in Pal Based Cplds (TECHNICAL NOTE)

One of the approaches used to partition inputs consists in modifying and limiting the input set using an external transcoder. This method is strictly related to output coding. This paper presents an optimal output coding in PAL-based programmable transcoders. The algorithm can be used to implement circuits in PAL-based CPLDs.